1. compact modeling of semiconductor devices

  2. model extraction of CMOS | DEMOS | parasitics | passives using in-house tools

  3. BSIM: thorough understanding of parameters, formulations, limitations

  4. Verilog A: developed 1/f noise model for pocket implanted devices

  5. Spectre: dc | ac | transient | statistical simulations with netlists

  6. Spectre MDL: for circuit simulation used for FOM analysis and corner model definition

  7. Cadence Virtuoso: test circuit simulation | layout verification

  8. Python: script development for model vs silicon, statistical data analysis

  9. >90% of work done in Linux Redhat environment

  10. Spotfire: fab data trend and parametric correlation analysis


  1. Sangwoo Kang was born in Seoul, South Korea, but lived most of his childhood life abroad in the US and UK. He received his BS and MS degrees in electrical engineering at Seoul National University where he studied CMOS scaling limits and single-electron transistors. He worked at Hynix Semiconductors for four years as a DRAM device engineer focusing on peripheral device development and ramp. He then went on to pursue his Ph D at the University of Texas at Austin where he studied 2D material based tunneling devices. He is currently working as a modeling engineer at Texas Instruments where he is delivering compact device models for embedded and analog products.

  1. Fluent in English: lived in US & UK during most of childhood

  2. TOEFL iBT:  111 / 120

  3. GRE:  Verbal 720 (98%)  |  Quantitative 800 (94%)  |  Writing 4.0 (45%)

  1. HSPICE: circuit simulation utilizing negative differential resistance of SETs

  2. Silvaco ATHENA process simulator: for process flow development

  3. Silvaco ATLAS device simulator: for electrostatics analysis

  4. Cadence Virtuoso: IC layout design  |  gds generation for EBL

  1. semiconductor device engineering

  2. Synopsys TSUPREM-4 & MEDICI: experimental condition assessment

  3. Spotfire | Microsoft Excel & VBA: fab data trend analysis

  4. Cadence Virtuoso: test pattern definition and layout verification

  1. novel semiconductor device design | process flow development | implementation

  2. semiconductor device physics for mesoscopic device data analysis

  3. solid state physics for 2D material based device data analysis

  4. semiconductor processing and analysis equipments

  5. electron-beam lithography (EBL), scanning electron microscopy (SEM),

  6. atomic force microscopy (AFM), Raman spectroscopy, thin film deposition (CVD/PVD),

  7. atomic layer deposition (ALD), plasma etch, wire bonding

  1. process integration | device characterization | device data analysis

  2. Agilent 4156  |  Keysight B1500 parameter analyzer

  3. Cascade/Lakeshore probe stations  |  Quantum Design PPMS